| Title |
Zero-IF architektūros siųstuvų/imtuvų I/Q disbalanso kompensacijos eksploatacijos metu metodo sukūrimas ir tyrimas / |
| Translation of Title |
Development and research of a method for online I/Q imbalance compensation of Zero-IF architecture transceivers. |
| Authors |
Šervenikas, Tomas |
| Full Text |
|
| Pages |
65 |
| Keywords [eng] |
fpga ; zero-if ; direct conversion ; sdr ; iq imbalance |
| Abstract [eng] |
This thesis describes a new method for lessening the effects of phase and amplitude IQ imbalance in Zero-IF transceivers. This method is unique in that it does not require the normal operation of the transceiver to be suspended while performing the calibration. Thesis contains the schematic representation of the method, as well as the influence of various method’s parameters to the process of calibration. |
| Dissertation Institution |
Kauno technologijos universitetas. |
| Type |
Master thesis |
| Language |
Lithuanian |
| Publication date |
2020 |
