| Title |
Factor of randomness in functional delay fault test generation for full scan circuits / |
| Translation of Title |
Atsitiktinumo faktorius sudarant pilnutinio skleidimo nuosekliu schemų funkcinius vėlinimo gedimų tikrinimo testus. |
| Authors |
Bareiša, E ; Bieliauskas, P ; Jusas, V ; Targamadzė, A ; Motiejūnas, L ; Šeinauskas, R |
| Full Text |
|
| Is Part of |
Elektronika ir elektrotechnika.. Kaunas : Technologija. 2010, Nr. 9, p. 39-42.. ISSN 1392-1215. eISSN 2029-5731 |
| Abstract [eng] |
We investigated the influence of the random generation methods to the results of the functional delay test generation. There are the three possibilities: random generation of values 0 and 1 when the probability for the appearance of each value is 50% in every bit of test pattern; random generation of large integer values, which then are split into the sequences of 0’s and 1‘s according to the rules of the conversion of the decimal number to the binary number; anti-random generation when the presence of the earlier generated patterns is taken into account. We adopted the anti-random generation for the functional delay faults. The obtained results of the investigation indicate that the random generation has the direct influence to the results of the functional delay test generation. The largest coverage of transition fault is obtained when the anti-random generation is employed. |
| Published |
Kaunas : Technologija |
| Type |
Journal article |
| Language |
English |
| Publication date |
2010 |
| CC license |
|
