| Title |
FPGA based packet splitter implementation using mixed desing flow / |
| Another Title |
FPGA pagrįstas duomenų paketų skaidytuvas. |
| Another Title |
Разделитель пакетов данных на основе FPGA. |
| Authors |
Shinde, S.A ; Shelake, V.G ; Kamat, R.K |
| Full Text |
|
| Is Part of |
Elektronika ir elektrotechnika.. Kaunas : Technologija. 2008, Nr. 8, p. 15-18.. ISSN 1392-1215. eISSN 2029-5731 |
| Keywords [eng] |
system design ; Information networks ; safety appliances ; data transmission systems |
| Abstract [eng] |
Design and development of a FPGA based packet splitter using Handle–C DK4 design suite is reported. A mixed design flow comprising of the integration of tools from third party has been adopted for the simulation, testing, debugging and generation of the RTL model. The reported packet splitter core has lot of potential applications in passive monitoring of the networking setup, security appliances etc. Ill. 2, bibl. 8. |
| Published |
Kaunas : Technologija |
| Type |
Journal article |
| Language |
English |
| Publication date |
2008 |
| CC license |
|
