| Title |
Funkcinių testų skaitmeniniams įrenginiams projektavimas ir analizė / |
| Translation of Title |
Design and analysis of functional tests for digital devices. |
| Authors |
Narvilas, Rolandas |
| Full Text |
|
| Pages |
43 |
| Keywords [eng] |
circuit testing ; fault models ; functional test generation ; delay fault models ; black-box fault models. |
| Abstract [eng] |
Project objective – to develop a system, which generates functional tests for non-scan synchronous sequential circuits based on functional delay models. During project execution, the analysis of design and technology solutions was performed. The architecture of the developed software is based on the requirement to be able to use the models of the benchmark circuits that are written in C programming language. Analysis of the effectiveness of the model file integration, possibilities of improving random test sequence generation and the influence of distribution of „1“ in randomly generated test patterns was performed. The results of the analysis were: • Type of the model file integration has little effect when using large circuit models. • The implementation of semi deterministic algorithms showed that the optimisation of separate steps by construction of test subsequences doesn’t improve the final outcome. • The distribution of „1“ in randomly generated test patterns has effect on the fault coverage and can be used to improve test generation process. |
| Type |
Master thesis |
| Language |
Lithuanian |
| Publication date |
2011 |
