| Title |
Acceleration of fault simulation based on a separate list of faults for each test pattern / |
| Authors |
Seinauskas, Rimantas ; Cvirka, Ramunas ; Rudzioniene, Greta |
| DOI |
10.5755/j01.eee.21.3.5774 |
| Full Text |
|
| Is Part of |
Elektronika ir elektrotechnika.. Kaunas : KTU. 2015, vol. 21, no. 3, p. 62-65.. ISSN 1392-1215 |
| Keywords [eng] |
Integrated circuit testing ; failure analysis ; fault simulation ; model checking |
| Abstract [eng] |
A new fault simulation procedure is suggested. The procedure provides fault detection of individual test patterns at the beginning. In this way, most faults are detected quickly. The remaining faults are analysed by conventional means with a sequence of test patterns. Creation of individual fault lists of test patterns allows speeding up the fault simulation. The fault simulation acceleration increases with circuit size and test coverage. |
| Published |
Kaunas : KTU |
| Type |
Journal article |
| Language |
English |
| Publication date |
2015 |
| CC license |
|
